Publications

Found 10 results
Author Title Type [ Year(Asc)]
Filters: Author is Yunsup Lee  [Clear All Filters]
2013
Vo, H., Lee Y., Waterman A., & Asanović K. (2013).  A Case for OS-Friendly Hardware Accelerators.
Lee, Y., Krashinsky R., Grover V., Keckler S. W., & Asanović K. (2013).  Convergence and Scalarization for Data-Parallel Architectures.
2012
Bachrach, J., Vo H., Richards B., Lee Y., Waterman A., Avižienis R., et al. (2012).  Chisel: Constructing Hardware in a Scala Embedded Language.
Zimmer, B., Toh S. Oon, Vo H., Lee Y., Thomas O., Asanović K., et al. (2012).  SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS. IEEE Transactions on Circuits and Systems-II. 59(12), 853-857.
2011
Lee, Y. (2011).  Efficient VLSI Implementations of Vector-Thread Architectures.
Lee, Y. (2011).  Efficient VLSI Implementations of Vector-Thread Architectures.
Lee, Y., Avižienis R., Bishara A.., Xia R.., Lockhart D.., Batten C., et al. (2011).  Exploring the Tradeoffs Between Programmability and Efficiency in Data-Parallel Accelerators. 129-140.
Waterman, A., Lee Y., Patterson D., & Asanović K. (2011).  The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA.
2010
Tan, Z., Waterman A., Avižienis R., Lee Y., Cook H., Patterson D., et al. (2010).  RAMP Gold: An FPGA-Based Architecture Simulator for Multiprocessors.
2009
Catanzaro, B., Kamil S., Lee Y., Asanović K., Demmel J., Keutzer K., et al. (2009).  SEJITS: Getting Poductivity AND Performance with Selective Embedded JIT Specialization.